# Design of High Speed and Low Area Masked AES Using Complexity Reduced Mix-Column Architecture

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**Abstract**

In this paper, presents optimized mix column
architecture to get less area and delay than the existing mix
column. Because the proposed mix column architecture is
reduced using Xtime unit. In the existing architecture, we
are used complex mix-column in masked AES architecture.
It consists of 8 multipliers and 11 adders. It consumes more
area and power. In the proposed architecture, a novel mixcolumn
is introduced to reduce the area and power than the
existing method. The proposed mix-column consists of only
12 adders and 4 Xtime circuit. Instead of normal multiplier
in the MixColumns, we are using Xtime unit to reduce the
circuit complexity. The proposed 128bits AES Scheme
provides high secure and less area. It is used for ATM, Net
banking, Satellite Communication, Military applications.

**Keywords:**Advanced Encryption Standard, ATM, Mix-
Column Transformation, Multipliers, X-time circuit.

**I.Introduction **

This AES standard specifies the Rijndael algorithm, a
symmetric block cipher that can process data blocks of 128
bits, using cipher keys with lengths of 128, 196, and 256
bits. Rijndael was designed to handle additional block sizes
and key lengths; however they are not adopted usually.
Throughout the remainder of this standard, the algorithm
specified here in will be referred to as “the AES algorithm”
[1]. The algorithm may be used with the three different key
lengths indicated above, and therefore these different
“flavours” may be referred to as “AES-128”, “AES-192”,
and “AES-256”. This standard may be used by Federal
departments and agencies when an agency determines that
sensitive (unclassified) information requires cryptographic
protection. Other FIPS-approved cryptographic algorithms
may be used in addition to, or in lieu of, this standard.
Federal agencies or departments that use cryptographic
devices for protecting classified information can use those
devices for protecting sensitive (unclassified) information
in lieu of this standard [2]. In addition, this standard may be
adopted and used by non-Federal Government
organizations.

Such use is encouraged when it provides the desired security
for commercial and private organizations. The algorithm
specified in this standard may be implemented in software,
firmware, hardware, or any combination thereof. The
specific implementation may depend on several factors such
as the application, the environment, the technology used, etc
[4]. In advanced encryption standard a plain text is
converted into cipher text. Cipher stands for a Series of
transformations that converts a plaintext to cipher text using
the Cipher Key. The Advanced Encryption Standard (AES)
specifies a FIPS-approved cryptographic algorithm that can
be used to protect electronic data. The (AES) algorithm is a
symmetric block cipher that can encrypt (encipher) and
decrypt (decipher) information. Encryption converts data to
an unintelligible form called cipher text; decrypting the
cipher text converts the data back into its original form,
called plaintext. The AES algorithm is capable of using
cryptographic keys of 128, 192, and 256 bits to encrypt and
decrypt data in blocks of 128 bits [3].

The AES algorithm takes the Cipher Key, K, and
performs a Key Expansion routine to generate a key
schedule. The Key Expansion generates a total of Nb (Nr +
1) The algorithm requires an initial set of Nb words, and
each of the Nr rounds requires Nb words of key data [5].
Key Expansion includes the following functions:
(1)Root Word (2) Sub Word (3) Rcon [i/NK]
The input and output for the AES algorithm each
consist of sequences of 128 bits (digits with values of 0 or
1). These sequences will sometimes be referred to as blocks
and the number of bits they contain will be referred to as
their length. The Cipher Key for the AES algorithm is a
sequence of 128, 192 or 256 bits.

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